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| PT6324 VFD Driver/Controller IC DESCRIPTION PT6324 is a Vacuum Fluorescent Display (VFD) Controller driven on a 1/8 to 1/16 duty factor housed in 52-pin plastic QFP/LQFP. 24 segment output lines, 16 grid output lines, one display memory, control circuit, key scan circuit are all incorporated into a single chip to build a highly reliable peripheral device for a single chip micro computer. Serial data is fed to PT6324 via a three-line serial interface. FEATURES * * * * * CMOS technology Low power consumption Wide operating voltage VDD=2.7V~5.5V Key scanning (16 x 2 matrix) Display modes: (24 segments, 8 digits to 24 segments, 16 digits) * 8-Step dimming circuitry * Serial interface for Clock, Data Input, Data Output, Strobe pins * No external resistors needed for driver outputs APPLICATIONS * Microcomputer peripheral devices * Digital Audio/Video system: CD/MD/VCD/DVD players * Car audio * VCR * Electric scale meter * P.O.S. * Electronic equipment with instructional display BLOCK DIAGRAM Tel: 886-66296288Fax: 886-29174598 http://www.princeton.com.tw2F, 233-1, Baociao Road, Sindian, Taipei 23145, Taiwan PT6324 16-GRID X 24-SEGMENT VFD APPLICATION CIRCUIT Notes: 1. The value of Rosc is depend on PT6324 IC chip supply voltage of VDD (Rosc=82K, when VDD=5V; Rosc=100K, when VDD=3.3V). 2. Z1, Z2=Zener diode 5.1V 3. Please adding the current amplifying circuit as following figure when IOHGR>15mA on VFD panel for high brightness issue. *=C.A. Circuit=Current amplifying circuit C.A. Circuit-1 & C.A. Circuit-2 Ex.: Parts recommended: * Q=SAMSUNG-KSR1105 (General fast switching transistor) * D=HITACHI-HSM221C (General fast recovery diode) V1.3 2 PT6324 ORDER INFORMATION Valid Part Number PT6324-Q PT6324-LQ Package Type 52-Pin, QFP 52-Pin, LQFP Top Code PT6324-Q PT6324-LQ PIN CONFIGURATION V1.3 3 PT6324 PIN DESCRIPTION Pin Name CLK DIN I/O I I Description Clock input pin This pin reads serial data at the rising edge and outputs data at the falling edge. Data input pin When this pin acts as input pin, serial data is inputted at the rising edge of the shift clock (starting from the lower bit) Serial interface strobe pin The data input after the STB has fallen is processed as a command. When this in is "HIGH", CLK is ignored. Data output pin (N-channel, Open-drain) When this pin acts as output pin, serial data is outputted at the falling edge of the shift clock (starting from the lower bit) Key data input pins The data inputted to these pins is latched at the end of the display cycle. Oscillator input pin A resistor is connected to this pin to determine the oscillation frequency. Ground pin Logic power supply High-voltage segment output pins Also acts as the key source High-voltage segment output pins High-voltage grid output pins Pull-down level Pin No. 1 2 STB I 3 DOUT K1 to K2 OSC GND VDD SG1/KS1 to SG16/KS16 SG17 to SG24 GR1 to GR16 VEE O I I O O O - 4 5, 6 7 8, 52 9, 51 10 to 25 26 to 33 34 to 49 50 V1.3 4 |
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